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CRC5

CRC5 for RFID


 

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jgmh
New User



Joined: 20 May 2009
Posts: 2


May 20, 2009 9:09 am

Hi,

I'm trying to verify my CRC5 according to EPC specification but I just can't figure it out.

Input = 10000001000000000
Poly = 101001
CRC = 10011
Preset (According to EPC) = 01001
Residue (According to EPC) = 00000

I've tried to figure out the algorithm but I just don't know where is my mistake.

I want to do it manually first in order to understand the problem, but the number of bits in the input and the Preset confuses me.

Any suggestion?

Thanks a lot
regregex
Preferred Member



Joined: 30 Oct 2007
Posts: 184
Location: London, UK

May 20, 2009 9:38 pm

Hello jgmh, welcome to the forum.

Regarding parameter lengths: The preset (and the CRC and the residue), being remainders of the polynomial, are constrained to be shorter than the polynomial. The input, being the dividend, is free to be any length.

As Annex F of the Gen 2 spec shows, the CRC register is initialised to the preset 01001 (drawn in reverse.)
Code:
Flag  Register  Input
   -     01001  10000001000000000
         ^      ^
The MSB bit of the preset (0) is XORed with the MSB of the input (1) and stored in the flag.
Code:
   1     01001  10000001000000000
Both MSBs are discarded. A zero is inserted in the LSB of the register.
Code:
   1     10010  0000001000000000
If the flag is 1, the register is XORed with the polynomial (excluding the top bit, i.e. 01001.) The flag is now discarded.
Code:
   -     11011  0000001000000000
The process is repeated until no more input bits remain:
Code:
   -     11011  0000001000000000
   1     11011  0000001000000000
   1     10110  000001000000000
   -     11111  000001000000000

   1     11111  000001000000000
   1     11110  00001000000000
   -     10111  00001000000000

   1     10111  00001000000000
   1     01110  0001000000000
   -     00111  0001000000000

   0     00111  0001000000000
   0     01110  001000000000
   -     01110  001000000000

   0     01110  001000000000
   0     11100  01000000000
   -     11100  01000000000

   1     11100  01000000000
   1     11000  1000000000
   -     10001  1000000000

   0     10001  1000000000
   0     00010  000000000
   -     00010  000000000

   0     00010  000000000
   0     00100  00000000
   -     00100  00000000

   0     00100  00000000
   0     01000  0000000
   -     01000  0000000

   0     01000  0000000
   0     10000  000000
   -     10000  000000

   1     10000  000000
   1     00000  00000
   -     01001  00000

   0     01001  00000
   0     10010  0000
   -     10010  0000

   1     10010  0000
   1     00100  000
   -     01101  000

   0     01101  000
   0     11010  00
   -     11010  00

   1     11010  00
   1     10100  0
   -     11101  0

   1     11101  0
   1     11010  -
   -     10011  -
The contents of the register are appended to the message, MSB first, as the CRC. If this augmented message is divided it is easy to see its residue must be 00000.
Code:
Flag  Register  Input
   -     01001  1000000100000000010011
...
   -     10011  10011
...
   -     00000  -
HTH.

--Greg
jgmh
New User



Joined: 20 May 2009
Posts: 2


May 21, 2009 1:17 pm

Hello Regregex,

Thanks a lot for your help. I Finally understood the check process. It was very useful.
jack
Guest







Oct 23, 2009 2:08 am

Thanks. I finished it by your instruction.

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